Power Trade-offs and Low Power in CMOS ICs

To get the best performance, knowing the limits of power in analog circuits and clearly defining the environment where analogue circuits should work is a must. Starting from fundamental/physical limits we are discussing the practical limits of power in digital, mostly at the architecture level and practical limits of power in analogue at circuit and architecture level. The fundamental limits are asymptotic limits and they cannot provide realistic comparisons between possible solutions. That is why the approach here provides a step further into power analysis by discussing all possible practical specs related to power at circuit and architecture level. For analogue circuits Dynamic-Range Speed product is limited by power, topology and supply voltage regardless of the type of circuits: continuous time or sampled data, current-mode or voltage mode.